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1 video ics video switch for canal-plus decoder BA7630S / ba7630f the BA7630S and ba7630f are decoder switching ics for the scrambled broadcasts in france. the ics include a 3- input multiplexer, 2-input multiplexers with 6db amplifiers, and a 9-bit serial-to-parallel converter. these ics greatly simplify decoder switching, and can be connected to a control microprocessor using just two lines. applications video cassette recorders features 1) all the switching functions required for secam canal plus decoder integrated onto one chip. 2) built-in 9-bit serial-to-parallel converter for decoder and tv control reduces number of microprocessor wiring connections required. 3) inputs have a sync-tip clamp. 4) the switch section can be used independently. 5) low power consumption off a 5v supply. absolute maximum ratings (ta = 25?) parameter symbol limits unit v cc 9 * 1 v BA7630S 500 * 2 mw ba7630f 600 * 3 topr ? 25 ~ + 70 c tstg ? 55 ~ + 125 c pd power supply voltage power dissipation operating temperature storage temperature * 1 13v for switches 1 to 9. * 2 reduced by 5.0mw for each increase in ta of 1 c over 25 c. * 3 reduced by 6.0mw for each increase in ta of 1 c over 25 c. recommended operating conditions (ta = 25?) parameter symbol min. typ. max. unit v cc 4.5 5.0 5.5 v power supply voltage
2 video ics BA7630S / ba7630f pin descriptions pin no. pin no. 1 in 4 out 2 2 gnd 3 in 1 4 (5) reset in sw 5 out 5 (6) in 2 sw 6 out gnd sw 7 out in 3 sw 8 out sw 1 in / out clock in sw 2 in / out data in sw 3 in / out sw 9 out out 3 out 1 6 (7) 7 (8) 8 (9) 9 (10) 10 (13) 11 (14) v cc sw 4 in / out 12 (15) 13 (16) 14 (17) 15 (20) 16 (21) 17 (22) 18 (23) 19 (24) 20 (26) 21 (27) 22 (28) pin name pin name pin numbers in parentheses are for the ba7630f. block diagram 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 buff bias bias buff logic 6db amp 6db amp control logic latches shift register sw 4 sw 3 sw 12 sw 2 sw 1 sw 12 sw 4 sw 3 sw 2 sw 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 17 16 15 28 27 26 25 24 23 22 21 20 19 18 buff bias buff buff logic 6db amp 6db amp control logic latches shift register sw 4 sw 3 sw 12 sw 2 sw 1 sw 12 sw 4 sw 3 sw 2 sw 1 BA7630S ba7630f
3 video ics BA7630S / ba7630f electrical characteristics (unless otherwise noted ta = 25? and v cc = 5.0v) parameter symbol min. typ. max. unit conditions measurement circuit i cc 28 40 ma fig.1 v om 2.5 2.8 v p-p f = 1khz, thd = 0.5 % fig.1 g v1 ? 0.5 0 0.5 db f = 1mhz, v in = 1.0v p-p g v2 5.5 6.0 6.5 db f = 1mhz, v in = 1.0v p-p g f ? 4.0 ? 1.5 + 1.0 db 10mhz / 1mhz v in = 1.0v p-p c tm 60 ? 45 db f = 4.43mhz v in = 1.0 p-p v th1 ~ 4 1.0 2.0 3.0 v v ih 3.0 v fig.3 v il 1.0 v i ih i il 210 m a fig.2 ? 80 ? 100 ? 150 m a i qh1 ~ 4 150 230 350 m av cc = 12v i qh5 ~ 9 050 m av cc = 12v v ql 0.1 0.5 v i cc = 2ma fig.1 f max. 250 500 khz t su 0.1 1.0 m s supply current analog ? maximum output level voltage gain 1 voltage gain 2 frequency characteristic interchannel crosstalk digital ? "h" input voltage "l" input voltage "h" input current "l" input current "h" output leakage current 1 "h" output leakage current 2 "l" output voltage maximum clock frequency setup time sw 1 ~ sw 4 switch level
4 video ics BA7630S / ba7630f measurement circuits BA7630S 22 21 20 18 19 17 16 15 14 13 12 1 2 3 5 4 6 7 8 9 10 11 buff bias buff buff logic 6db amp 6db amp control logic shift register sw 4 sw 3 sw 12 sw 2 sw 1 sw 12 sw 4 sw 3 sw 2 sw 1 sw d sw e sw f 3v 1v sw g sw h sw i latches v 2 1 1 1 1 1 2 2 2 2 2 ~ 1 50 w 50 w 50 w 50 w ~ sw c 2 1 ~ sw b 2 1 ~ sw a osc 1 m 47 m v cc 5.0v 1 m 1 m 1 m 2 1 ~ a sw j v 2 1 ~ sw k v 2 1 ~ fig.1 distortion meter distortion meter distortion meter + + + +
5 video ics BA7630S / ba7630f BA7630S 12 13 buff bias buff buff logic 6db amp 6db amp control logic shift register sw 4 sw 3 sw 12 sw 2 sw 1 sw 12 sw 4 sw 3 sw 2 sw 1 sw 0 a 3 12v v 1 latches v a 14 15 16 17 18 19 20 21 22 11 10 9 8 7 6 5 4 3 2 1 output measurement circuit output measurement circuit output measurement circuit sw 1 a 1 v cc = 5.0v a 2 5.0v input measurement circuit output measurement circuit 47 m v a output measurement circuit output measurement circuit output measurement circuit output measurement circuit input measurement circuit input measurement circuit output measurement circuit fig.2 +
6 video ics BA7630S / ba7630f BA7630S 12 13 buff bias buff buff logic 6db amp 6db amp control logic shift register sw 3 sw 4 sw 12 sw 2 sw 1 sw 12 sw 4 sw 3 sw 2 sw 1 sw 1 sw 2 sw 3 c l c l c l r l r l r l 12v latches 14 15 16 17 18 19 20 21 22 11 10 9 8 7 6 5 4 3 2 1 v cc = 5.0v 47 m 12v pg 50 w pg pg 50 w 50 w r l c l sw 9 r l c l sw 8 r l c l sw 7 r l c l sw 6 r l c l sw 5 r l c l sw 4 fig.3 +
7 video ics BA7630S / ba7630f measurement conditions i cc 22222222 v om 1-1 v om 2-1 v om 3-1 2 2 2 1 2 2 2 1 2 2 2 1 1 1 2 1 2 2 2 2 v om 1-2 v om 3-2 2 2 1 2 2 2 2 1 2 2 2 2 v om 2-3 v om 4-3 2 1 2 2 1 2 2 2 1 2 2 2 g v1 1-2 g v1 3-2 g v1 2-3 g v1 4-3 2 2 2 1 1 2 2 2 2 2 1 2 2 1 2 2 1 2 1 2 2 2 1 2 g v2 1-1 g v2 2-1 g v2 3-1 2 2 2 1 2 2 2 1 2 2 2 1 1 1 2 1 2 1 1 1 g f 1-1 g f 2-1 g f 3-1 2 2 2 1 2 2 2 1 2 2 2 1 1 1 2 1 2 2 2 2 g f 1-2 g f 3-2 2 2 1 2 2 2 2 1 2 2 2 2 g f 2-3 g f 4-3 2 1 2 2 1 2 2 2 1 2 2 2 c tm 1-1-2 c tm 1-1-3 c tm 2-1-1 c tm 2-1-3 c tm 3-1-1 c tm 3-1-2 2 2 2 2 2 2 2 2 1 2 1 2 1 2 2 2 2 1 2 1 2 1 2 2 1 1 1 1 2 2 1 1 2 2 2 2 1 1 1 1 1 1 c tm 1-2-3 c tm 3-2-1 2 2 2 1 2 2 1 2 1 2 1 1 c tm 2-3-4 c tm 4-3-2 1 2 2 2 2 1 2 2 1 2 1 1 sw a sw b sw c sw d sw e sw f sw g sw h sw i sw j sw k interchannel crosstalk frequency characteristics voltage gain 1 voltage gain 2 maximum output level current dissipation parameter measure- ment method switch setting symbol the measurements in the above table were made with switching voltage levels for sw 1 to sw 4 of "l" = 1v, and "h" = 3v. note 1: connect distortion meters to the outputs. adjust the input level so that the output distortion is 0.5% for a f = 1khz s ine wave input. this output voltage is the maximum output level v om (v p-p ). note 2: input a f = 1mhz, 1v p-p sine wave. the voltage gain g v = 20 log v out / v in (db). note 3: input a f = 1mhz and 10mhz, 1v p-p sine wave. the frequency characteristic g f = 20 log v out (f = 10m) / v out (f = 1m) (db). note 4: input a f = 4.43mhz, 1v p-p sine wave. 0db amplifier sw crosstalk is c tm0 , and the 6db amplifier sw crosstalk is c tm6 . c tm0 = 20 log v out / v in (db) c tm6 = 20 log v out / v in + 6 (db) note 1 note 2 note 3 note 4
8 video ics BA7630S / ba7630f circuit operation digital block truth table input output reset clock data sw 1 ?w 9 h hh ll sw 1-o ?w 9-o lh sw 1-o ?w 9-o l - hsw 1-o ?w 9-o l - lsw 1-o ?w 9-o l lsw 1-o ?w 9-o l hsw 1-n ?w 9-n data "l" sent to internal shift register data "h" sent to internal shift register internal shift register data unchanged contents of internal shift register sent to internal latch note 1: h: high level note 2: l: low level note 3: : either h or l note 4: - : l to h transition note 5: : h to l transition note 6: sw 1-o to sw 9-o : sw 1 to sw 9 levels before establishing the input conditions shown in the table. note 7: sw 1-n to sw 9-n nearest clock transition. note analog truth table (1) out1 switch sw 1 sw 2 reset select l l h in1 l h h in2 h l h in3 h h h in3 (2) out2 switch sw 3 reset select l h in1 h h in3 (3) out3 switch sw 4 reset select l h in2 h h in4 note: when using the switches independently without the digital block, the reset pin must be set to "h".
9 video ics BA7630S / ba7630f 1 clk data 2 3 4 5 at points 1 to 4 data is input to the shift register. at point 5 the contents of the shift register are transferred to the latch and simultaneously output. fig. 4 clk and data relationship digital circuit operation (1) introduction the BA7630S has 9-bit serial-to-parallel converter and latch circuit that has been included to expand the num- ber of microprocessor output ports. the breakdown voltage of the output pins is 13v, so switch them in the range 0 to 12v. in addition to controlling the BA7630S switching block, these outputs can be used to control audio switching, scrambling decoders, and television sets. (2) using the serial-to-parallel convertor block signal input is basically done using clock and date pulses. as shown in fig.10, the date is read on the ris- ing edge of the clock pulses. if the date is ??on the rising edge of the clock pulse, a ??data bit is input to the shift register, and if the data is ??on the rising edge of the clock pulse, a ??data bit is input to the shift register. the shift register is sequentially incre- mented by the bit corresponding to sw 1 . data in excess of 9 bits is sequentially discarded. if the data is ??on a falling edge of the clock, the con- tents of the shift register are read into the internal latch, and simultaneously output to the output port (the data polarity is inverted on output). this output is maintained until the latch is setup again. to reset, set the reset pin to ?? the internal shift register and latch contents go low (latch output all ??, for the duration that reset is held high. (3) pulse timing the pulse timing diagrams are given below. 123456789 q q q q q q q q q sw 1 sw 2 sw 9 reset latch latch data in data flow shift register fig. 5 digital block t su data clk t su 0.1 m s (typ.) 1.0 m s (max.) fig. 6 clock rising edge and data relationship (setup time) t su data clk t su 0.1 m s (typ.) 1.0 m s (max.) fig. 7 clock falling edge and data relationship (setup time) sw 1 ~ sw 9 out reset 0.26 m s (typ.) 2.0 m s (max.) t plh t phl fig. 8 reset and output relationship (reset transmission time) t plh9 t phl sw 1 ~ sw 9 out data clk 1.2 m s (typ.) 5.0 m s (max.) fig. 9 clock falling edge and output relationship (latch transmission time)
10 video ics BA7630S / ba7630f timing chart reset data clock sw 1 sw 2 sw 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 reset reset data data fig.10
11 video ics BA7630S / ba7630f application examples (1) analog block BA7630S pin layout 75 w in1 v cc v cc1 v cc2 to vcr to decoder in to tv in v cc2 1 m f 47 m f 470 ~ 1000 m f 470 ~ 1000 m f 2sa933 2sa933 out1 out2 out3 gnd 5v r r 75 w 75 w from vtr tuner out 3 2 13 22 75 w in2 1 m f from decoder out 5 75 w in3 1 m f from tv out 7 75 w in4 1 m f from video out 1 gnd 6 12 11 6db amp 6db amp v cc2 r 5v 100 12v 390 fig.11 + + + + + + + + (2) digital block sw out v cc 4.5 ~ 13v sw 1 ~ sw 9 sw 1 ~ sw 4 only open collector 22k 50k w 28k w fig.12
12 video ics BA7630S / ba7630f electrical characteristic curves 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 ?20 100k 200k 500k frequency (hz) gain (db) 1m 2m 5m 10m 20m 30m 3pin-22pin 5pin-22pin 7pin-22pin v in = 10v p-p fig. 13 frequency characteristic(out1) 0 ?20 ?30 ?40 ?50 ?10 ?60 ?70 100k 200k 500k frequency (hz) crosstalk: ct (db) 1m 2m 5m 10m 20m 3pin-22pin 5pin-22pin 7pin-22pin v in = 1.0v p-p fig. 14 crosstalk characteristic (out1) 6 4 2 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 100k 200k 500k frequency (hz) gain (db) 1m 2m 5m 10m 20m 30m 1pin-11pin 5pin-11pin 3pin-12pin 7pin-12pin input 1v p-p fig. 15 frequency characteristic (out2 and out3) 0 ?20 ?30 ?40 ?50 ?10 ?60 ?70 100k 200k 500k frequency (hz) crosstalk: ct (db) 1m 2m 5m 10m 20m 1pin-11pin 5pin-11pin 3pin-12pin 7pin-12pin input 1v p-p fig. 16 crosstalk characteristic (out2 and out3) external dimensions (units: mm) BA7630S ba7630f sdip22 sop28 3.95 0.3 0.51min. 19.4 0.3 3.4 0.2 0.5 0.1 6.5 0.3 1 11 12 22 0.3 0.1 0 ~ 15 1.778 7.62 0.15 28 15 14 1 0.4 0.1 0.3min. 0.15 0.1 7.5 0.2 9.9 0.3 18.5 0.2 0.11 2.2 0.1 1.27

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